Conventionally, there has been a technology which stacks multiple semiconductor chips having integrated circuits formed thereon and electrically connects the semiconductor chips by TSVs (Through Silicon Vias) to reduce the footprint of the semiconductor device. In the manufacture of semiconductor chips, multiple chip areas with dicing lines in between are formed in a semiconductor wafer. Then, after their electrical characteristics are inspected, the semiconductor wafer is cut along the dicing lines, thereby being divided into semiconductor chips. For semiconductor wafers, it is important to secure the gross quantity in order to improve the yield, but it is also important to secure an area for inspection.
In the photolithography used in the manufacture of semiconductor chips, there is desired the quick alignment of exposure positions without causing the occurrence of a crack in a dicing line and an influence on the characteristics of semiconductor chips.